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Motor Control and Timing

Understanding the NE555 Timer

See internal thresholds and how a one-shot pulse is generated.

  • By MySunDirection
  • 14 min read
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One-minute answer

You are applying “Understanding the NE555 Timer” to a real system and need the concept, assumptions and verification boundary to stay clear.

Follow the TI NE555 trigger and threshold comparators through its latch and discharge transistor, then calculate and verify a practical monostable pulse.

Select or check first
The CONT pin changes the decision levels. The control-voltage pin exposes the internal divider node. External voltage or noise there changes the threshold and trigger relationship.
Controlling assumption
Sensors, controller logic, actuator limits, timing, fault response and environmental conditions are defined together.
Top risk
The NE555 output is not a power relay. OUT and DISCH have voltage, current and power-dissipation limits. Inductive loads need an appropriate power stage and clamp path, and every load needs a defined return and supply-decoupling plan.
Proof
Check the exact manufacturer data, units and limits, then verify the result by calculation, measurement or a controlled acceptance test.
Start with the basics Optional foundation before “Understanding the NE555 Timer”

Automation-and-control basics

An automatic system measures a condition, decides what it means and commands an actuator while checking whether the expected result actually happened.

Sensor
A sensor converts a physical condition into a signal. Its range, uncertainty, response time, environment and failure behaviour matter as much as its nominal output.
Controller
A controller reads inputs, applies logic or a control law and issues outputs. Software cannot correct missing measurements, inadequate hardware authority or unsafe architecture.
Actuator
An actuator turns a command into physical action, such as motor torque, valve position or switching. Its real limits depend on load, supply, drive and duty.
Feedback
Feedback compares measured behaviour with the desired state so error can be corrected. Open-loop command assumes the action occurred; closed-loop control checks it.
Fault and safe state
A fault is an abnormal condition that may invalidate control. The safe response must be defined from the hazard and may require independent hardware, not only software.

How to use this article: Trace one complete chain—physical condition, sensor, signal conditioning, controller, drive, actuator and feedback—then ask how each link can fail.

On this page
  1. Two nominal thresholds control one latch
  2. A monostable converts one valid trigger into one timed pulse
  3. Verify the waveform at all three important nodes

The NE555 is easier to understand as two voltage decisions controlling one memory element. A low voltage at TRIG sets an internal latch; a high voltage at THRES resets it. The latch drives OUT and the open-collector DISCH transistor, so a short trigger can create a much longer pulse while an external resistor and capacitor define the timing. This article describes the bipolar Texas Instruments NE555 shown in the figures; other 555-family parts can have different limits and output behavior.

Two nominal thresholds control one latch

TRIG starts the set action; THRES ends it. RESET can force the reset state, and the control-voltage pin can alter the nominal thresholds.
Diagram description

The diagram is a functional model, not pin wiring. It assumes the CONT pin is not externally driven and omits transistor-level detail.

Read inputs as decisions, not as analog outputs
ConditionLatch actionOUTDISCH
RESET lowForced resetLowOn toward ground
RESET high; TRIG below trigger levelSetHighOff/open
RESET high; THRES above threshold levelReset when trigger is not asserting setLowOn toward ground
Between thresholdsRetain previous stateRetains stateRetains complementary action
CONT externally drivenComparison levels shiftDepends on resulting comparisonsDepends on latch

For the NE555, the data sheet describes a trigger level near one third of supply and a threshold level near two thirds. They are nominal ratios, not precision references. RESET has overriding control when asserted. With RESET inactive, a valid low trigger sets the latch; the data-sheet function table also defines behavior when trigger and threshold conditions occur together. Design from that table and the electrical limits rather than assuming two ordinary comparator outputs are simply wired together.

A monostable converts one valid trigger into one timed pulse

A brief low trigger releases the timing capacitor, OUT goes high, and the pulse ends when capacitor voltage reaches the threshold level.
Diagram description

The traces are idealized. The trigger must return high before timeout for a normal single pulse; supply and control bypassing follow the selected part data sheet.

One-shot timing sequence

  1. In the stable state, OUT is low and DISCH holds the timing capacitor near ground.
  2. A negative-going trigger below the trigger level sets the latch.
  3. OUT goes high and DISCH turns off, allowing the capacitor to charge through R.
  4. The capacitor rises exponentially toward the supply voltage.
  5. When THRES reaches its comparison level, the latch resets if the trigger is no longer active.
  6. OUT goes low and DISCH turns on, rapidly preparing the capacitor for another valid trigger.

Ideal NE555 monostable pulse width

t_w = −RC ln(1 − 2/3) = RC ln(3) ≈ 1.1RC

The ideal expression assumes the capacitor begins near zero, charges toward a stable supply through R, and trips at two thirds of that supply. Actual width includes resistor and capacitor tolerance, threshold variation, capacitor leakage, discharge saturation, trigger behavior, temperature and board leakage.

t_w
nominal high-pulse duration in seconds
R
timing resistance in ohms
C
timing capacitance in farads
ln
natural logarithm
The equation produces a nominal value, not a guaranteed pulse
ContributorEffectDesign response
R tolerance and temperature coefficientChanges charging currentUse a rated component and include drift
C tolerance and dielectric behaviorOften dominates nominal error and driftSelect a suitable dielectric and test time/temperature
LeakageDiverts charging current, especially at high RCheck timer, capacitor and board leakage limits
Threshold variationChanges voltage at which timing endsUse data-sheet limits, not only nominal ratios
Trigger width/noiseCan extend, retrigger or falsely start behaviorCondition the input and respect pulse requirements
Supply disturbanceMoves internal levels and can couple into timingBypass locally and separate high-current switching paths
Output loadingCreates voltage drop, heat and supply transientsStay within electrical and thermal limits; add a driver if needed
Example: choose a nominal 100 ms pulse

Choosing C = 1 µF gives R ≈ 0.100 s ÷ (1.1 × 1 µF) ≈ 90.9 kΩ, so a nearby standard nominal value may be selected only after an error budget. If both R and C were ±5% before other errors, worst-case component combinations alone would span roughly −9.75% to +10.25% because their product sets time. A measurement across supply, temperature and representative parts is still required.

Verify the waveform at all three important nodes

On a current-limited low-voltage bench supply, observe TRIG, the timing capacitor and OUT with a suitable oscilloscope reference. Confirm the idle state, trigger minimum, capacitor start voltage, threshold crossing, discharge time and repeat interval. Repeat at supply limits and with the real output interface attached. If a microcontroller is available, compare whether its calibrated timer, watchdog and fault diagnostics better match the required accuracy and behavior.

The capacitor waveform behind the timing interval is explained in Why Capacitors Charge and Discharge Gradually. Treat the resulting pulse as one part of a control system, following the evidence principles in Open-Loop Commands Versus Real Feedback.

One-minute questions

Questions to answer before you apply this lesson

What should I select or check first for Understanding the NE555 Timer?

The CONT pin changes the decision levels. The control-voltage pin exposes the internal divider node. External voltage or noise there changes the threshold and trigger relationship.

Which assumption can change the conclusion?

Sensors, controller logic, actuator limits, timing, fault response and environmental conditions are defined together.

What can go wrong if I copy the example directly?

The NE555 output is not a power relay. OUT and DISCH have voltage, current and power-dissipation limits. Inductive loads need an appropriate power stage and clamp path, and every load needs a defined return and supply-decoupling plan.

How do I verify the result in the real system?

Check the exact manufacturer data, units and limits, then verify the result by calculation, measurement or a controlled acceptance test.

Sources and further reading

  1. xx555 Precision Timers DatasheetTexas Instruments · 2026-10-13Primary manufacturer datasheet reviewed for the NE555 functional block, trigger and threshold levels, reset priority, discharge output, monostable circuit, pulse-width equation and electrical limits.
  2. NE555 Product Information and Technical DocumentationTexas Instruments · 2026-10-13Manufacturer product record reviewed to confirm the selected bipolar NE555 family, monostable capability, supply range context and current documentation status.
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